module shift_ram_3_8bit
#(
parameter Ram_Length = 'd640
)
(
clken,
clock,
shiftin,
shiftout,
taps0x,
taps1x);
input clken;
input clock;
input \[:\] shiftin;
output \[:\] shiftout;
output \[:\] taps0x;
output \[:\] taps1x;
`ifndef ALTERA_RESERVED_QIS
// synopsys translate_off
`endif
tri1 clken;
`ifndef ALTERA_RESERVED_QIS
// synopsys translate_on
`endif
wire \[:\] sub\_wire0;
wire \[:\] sub\_wire1;
wire \[:\] shiftout = sub\_wire0\[:\];
wire \[:\] sub\_wire3 = sub\_wire1\[:\];
wire \[:\] sub\_wire2 = sub\_wire1\[:\];
wire \[:\] taps0x = sub\_wire2\[:\];
wire \[:\] taps1x = sub\_wire3\[:\];
altshift\_taps ALTSHIFT\_TAPS\_component (
.clock (clock),
.clken (clken),
.shiftin (shiftin),
.shiftout (sub\_wire0),
.taps (sub\_wire1)
// synopsys translate\_off
,
.aclr ()
// synopsys translate\_on
);
defparam
ALTSHIFT\_TAPS\_component.intended\_device\_family = "Cyclone IV E",
ALTSHIFT\_TAPS\_component.lpm\_hint = "RAM\_BLOCK\_TYPE=M9K",
ALTSHIFT\_TAPS\_component.lpm\_type = "altshift\_taps",
ALTSHIFT\_TAPS\_component.number\_of\_taps = ,
ALTSHIFT\_TAPS\_component.tap\_distance = Ram\_Length,
ALTSHIFT\_TAPS\_component.width = ;
endmodule
不同的地方
//浠跨湡
`timescale 1ns/1ns
module Generate_Matrix_3x3_8bit_tb;
//system
reg clk ; //时钟或是摄像头或是vga coms_clk , vga_clk
reg rst_n ; //复位
//coms or vga
reg pre_vs ; //行有效
reg pre_hs ; //场有效
reg pre_en ; //数据有效使能
reg [7:0] pre_img_Y ; //输出的灰度数据
wire [7:0] matrixp11,matrixp12,matrixp13;
wire [7:0] matrixp21,matrixp22,matrixp23;
wire [7:0] matrixp31,matrixp32,matrixp33;
wire matrix_vs ;
wire matrix_hs ;
wire matrix_en ;
initial clk = 1;
always #5 clk = ~clk;
initial begin
rst_n = 0;
pre_vs =0 ;
pre_hs = 0;
pre_en = 0;
pre_img_Y = 0;
#51;
rst_n = 1;
pre_vs = 1;
#20;
pre_hs = 1;
#20;
pre_en = 1;
#60;
pre_en = 0;
#20;
pre_hs = 0;
#20;
pre_hs = 1;
#20;
pre_en = 1;
#60;
pre_en = 0;
#20;
pre_hs = 0;
#20;
pre_hs = 1;
#20;
pre_en = 1;
#60;
pre_en = 0;
#20;
pre_hs = 0;
#20;
pre_hs = 1;
#20;
pre_en = 1;
#60;
pre_en = 0;
#20;
pre_hs = 0;
#20;
pre_hs = 1;
#20;
pre_en = 1;
#60;
pre_en = 0;
#20;
pre_hs = 0;
$stop;
end
reg [7:0] shiftin;
always@(posedge clk or negedge rst_n ) begin
if(!rst_n)
shiftin <= 'd1;
else if(pre_en)
shiftin <= shiftin + 1'b1;
else
shiftin <= shiftin;
end
Generate_Matrix_3x3_8bit Generate_Matrix_3x3_8bit(
//system
.clk (clk ), //时钟或是摄像头或是vga coms_clk , vga_clk
.rst_n (rst_n ), //复位
//coms or vga
.pre_vs (pre_vs ), //行有效
.pre_hs (pre_hs ), //场有效
.pre_en (pre_en ), //数据有效使能
.pre_img_Y ( shiftin ), //输出的灰度数据
.matrixp11 (matrixp11 ),
.matrixp12 (matrixp12 ),
.matrixp13 (matrixp13 ),
.matrixp21 (matrixp21 ),
.matrixp22 (matrixp22 ),
.matrixp23 (matrixp23 ),
.matrixp31 (matrixp31 ),
.matrixp32 (matrixp32 ),
.matrixp33 (matrixp33 ),
.matrix_vs (matrix_vs ),
.matrix_hs (matrix_hs ),
.matrix_en (matrix_en )
);
endmodule
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